1. Technical Field
The invention is related to a plasma reactor for processing a workpiece such as a semiconductor wafer with a process employing an etch selectivity-enhancing precursor material such as polymer precursor gases.
2. Background Art
1. Background Art Relating to the Parent Application:
High density RF plasma reactors for etching contact openings through silicon dioxide layers to underlying polysilicon conductor layers and/or to the silicon substrate of a semiconductor wafer are disclosed in the above-referenced application by Collins et al. Ideally, such a reactor carries out an etch process which quickly etches the overlying silicon dioxide layer wherever a contact opening is to be formed, but stops wherever and as soon as the underlying polysilicon or silicon material (or other non-oxygen-containing material such as silicon nitride) is exposed, so that the process has a high oxide-to-silicon etch selectivity. Such reactors typically include a vacuum chamber, a wafer support within the chamber, process gas flow inlets to the chamber, a plasma source coil adjacent the chamber connected to an RF power source usually furnishing plasma source power and another RF power source connected to the wafer support usually to furnish plasma bias power. For a silicon oxide etch process, a process gas including an etchant such as a fluorine-containing substance is introduced into the chamber. The fluorine in the process gas freely dissociates under typical conditions so much that the etch process attacks not only the silicon oxide layer through which contact openings are to be etched, but also attacks the underlying polysilicon or silicon material as soon as it is exposed by the etch process. Thus, a typical etch process carried out by such a reactor is not the ideal process desired and has a lower oxide-to-silicon etch selectivity. As employed in this specification, the term xe2x80x9cetch selectivityxe2x80x9d refers to the ratio between the etch rates of two different materials, such as silicon dioxide and silicon (either crystalline silicon or polycrystalline silicon hereinafter referred to as xe2x80x9cpolysiliconxe2x80x9d). A low etch selectivity can cause punch through. In etching shallow contact openings to intermediate polysilicon layers while simultaneously etching deep contact openings to the underlying silicon substrate, the etch process first reaches and will punch through the intermediate polysilicon layer before reaching the silicon substrate. A very high oxide-to-silicon etch selectivity is necessary to prevent the punchthrough, depending upon the ratio between the depths of the silicon substrate and the intermediate polysilicon layer through the silicon oxide. For example, if (a) the deep contact opening through the oxide to the substrate is 1.0 micron deep and is to be 50% overetched, (b) the intermediate polysilicon layer is 0.4 microns deep (below the top of the oxide layer) and (c) if not more than 0.01 microns of the intermediate polysilicon layer are to be removed (to avoid punch-through), then an oxide-to-silicon etch selectivity of at least 110:1 is required.
It is known that oxide-to-silicon etch selectivity is enhanced by a polymer film which forms more readily over silicon and polysilicon or other non-oxygen-containing layers than over silicon dioxide or other oxygen-containing layers. In order to form such a selectivity-enhancing polymer film, the fluorine-containing substance in the process gas is a fluoro-carbon or a fluoro-hydrocarbon. Some of the fluorine in the process gas is consumed in chemically etching the silicon dioxide layer on the wafer. Another portion of the fluorine reacts with other species including carbon contained in the process gas to form a polymer on the surface of the wafer. This polymer forms more rapidly and strongly on any exposed silicon and polysilicon surfaces (or other non-oxygen-containing surfaces) than on silicon dioxide (or other oxygen-containing surfaces), thus protecting the silicon and polysilicon from the etchant and enhancing etch selectivity. Etch selectivity is further improved by improving the strength of the polymer formed on polysilicon surfaces. The polymer is strengthened by increasing the proportion of carbon in the polymer relative to fluorine, which can be accomplished by decreasing the amount of free fluorine in the plasma. For this purpose, a fluorine scavenger, such as a silicon piece, can be provided in the reactor chamber and heated to avoid being covered with polymer and additionally to permit silicon ions, radicals and/or neutral species to be removed therefrom and taken into the plasma. The silicon atoms removed from the scavenger combine with some of the free fluorine in the plasma, thereby reducing the amount of fluorine available to polymerize and increasing the proportion of carbon in the polymer formed on the wafer.
While the use of a fluorine scavenger such as a heated silicon piece inside the reactor chamber enhances etch selectivity by strengthening the polymer formed on the wafer, even the etch selectivity so enhanced can be relatively inadequate for a particular application such as the simultaneous etching of contact holes of very different depths. Therefore, it would be desireable to increase the polymer strength beyond that achieved by the improved scavenging technique described above.
Another problem is that the rate of removal of silicon from the scavenger piece required to achieve a substantial increase in polymer strength is so great that the silicon piece is rapidly consumed and the consequent need for its replacement exacts a price in loss of productivity and increased cost. Typically the scavenger piece is a piece of silicon in the reactor chamber ceiling or wall or a piece of silicon near the reactor chamber ceiling. The rate of removal of silicon therefrom is enhanced by applying an RF bias potential to the silicon piece while its temperature is carefully controlled to a prevent polymer deposition thereon and to control the rate of silicon removal therefrom. As disclosed in the above-referenced U.S. application Ser. No. 08/543,067, silicon is added into the plasma by a combination of applied RF bias and heating of the scavenger piece. The temperature control apparatus is integrated with the silicon piece so that replacement of the silicon piece (e.g., a silicon ceiling) is relatively expensive. In U.S. application Ser. No. 08/597,577 referenced above, an all-silicon reactor chamber is disclosed in which the walls and ceiling are silicon, and any fluorine scavenging is done by consuming the silicon ceiling or walls, requiring their replacement at periodic intervals with a concomitant increase in cost of operation and decrease in productivity. Thus, not only is it desireable to increase the polymer strength but it is also desireable to decrease the rate at which silicon must be removed from the scavenger to achieve a desired etch selectivity.
2. Background Art Relating to the Present Application:
The reactor structure described in the detailed description below in this specification includes a fluorine-scavenger precursor material (such as silicon or silicon carbide) either in the form of a ceiling or a disposable ring around the pedestal, or both. In order to readily provide a fluorine-scavenging species to the plasma, this material is heated to a desired temperature (generally above the condensation temperature of the polymer formed from the fluorine and carbon species in the plasma). While this has provided significant process advantages as described below, the continuing trend of ever smaller semiconductor device critical dimensions and greater competition in semiconductor price require more improvements in process performance and cost effectiveness. Specifically, it is now desired to obtain a deeper (high aspect ratio) etch depth at a faster etch rate. A deeper etch depth is required to meet continuing reductions in critical dimension or opening size, while the faster etch rate is required to meet higher production through-put demands for lower device cost. It is also desired to improve photoresist facet selectivity in silicon oxide plasma etching. Such an improvement would provide a greater margin of safety against removal of silicon dioxide material at the edge of an opening due removal (xe2x80x9cfacetingxe2x80x9d) of photoresist at the edge. It is further desired to better control the etch profile to obtain a 90% taper of the vertical walls of the etched opening. It is also desired to critical dimension variance across the wafer surface (e.g., center to edge) to as low as 0.05 microns or less and to minimize silicon loss at the bottom of each etched opening to 800 angstroms or less. As yet another way of reducing costs, it is desired to reduce the cost of consumable materials in the reactor (such as the fluorine-scavenging precursor material of the ceiling). The present invention described below accomplishes all of the foregoing simultaneously.
For reactors of the type lacking a silicon or silicon-carbide ring around the pedestal as the fluorine-scavenger precursor material, the only fluorine-scavenger precursor material is a silicon reactor ceiling. In attempting to address the problem of through-put, the etch rate could be increased, theoretically, by reducing the ceiling temperature to reduce fluorine scavenging, thereby increasing the fluorine content of the plasma as well as the fluorine content of the protective polymer deposited on the wafer. A sufficient reduction in ceiling temperature would cause more polymer to deposit on the ceiling, thereby reducing the polymer deposition rate on the wafer. With such changes, the plasma would etch the silicon oxide layers faster and the high-fluorine content polymer itself would etch the silicon oxide layers, the combined effect of which is to significantly increase the rate at which silicon oxide is etched. However, this approach has not seemed feasible because the oxide etch selectivity would decrease due to the increase in fluorine content of the polymer condensed onto non-oxygen-containing surfaces. A polymer based upon Cxe2x80x94F bonding is weaker than a polymer based primarily upon pure Cxe2x80x94C bonding, so that a polymer containing more fluorine is weaker and provides less oxide-to-silicon selectivity. This latter disadvantage could be addressed by decreasing the plasma source power in order to enhance the oxide selectivity, but it would seem such a decrease would reduce the etch rate, so as to offset whatever etch rate gain was obtained by decreasing the roof temperature. Thus, a practical solution has not seemed to be attainable.
A high plasma density etch process for etching an oxygen-containing layer overlying a non-oxygen containing layer on a workpiece in a plasma reactor chamber, by providing a chamber ceiling overlying the workpiece and containing a semiconductor material, supplying into the chamber a process gas containing etchant precursor species, polymer precursor species and hydrogen, applying plasma source power into the chamber, and cooling the ceiling to a temperature range at or below about 150 degrees C. The etchant and polymer precursor species contain fluorine, and the chamber ceiling semiconductor material includes a fluorine scavenger precursor material. Preferably, the process gas includes at least one of CHF3 and CH2F2. Preferably, the process gas further includes a species including an inert gas, such as; He or Ar. If the chamber is of the type including a heated fluorine scavenger precursor material, this material is heated to well above the polymer condensation temperature, while the ceiling is cooled. In some cases, the plasma source power applicator is an inductive antenna overlying the semiconductor ceiling, and the ceiling has a cooling/heating apparatus contacting the ceiling through semiconductor rings. The inductive antenna in this case constitutes inductive elements between adjacent ones of the semiconductor rings.